Problem in Compilation

[ansuman]

I am trying to compile the do_test example under the basic_examples directory inside OVM. However, I am unable to do so. I am using the run_questa script there and I do have Questa license here. I am getting the following error:

ovm_misc.sv(244): Default value for separator not allowed in extern method definition

Please help.

Ansuman

[bosman]

Hi ansuman,

What version of Questa are you using? I have this example compiling and simulating on Questa 6.3c.

Bahaa

[kausikd]

Ansuman,

Most probably you are using an older version. Pleasr try with 6.3c or 6.3d

--KD

[sarath51]

Examples are working for me with MTi version 6.3c

[ansuman]

I am able to compile the examples with 6.3d. I was using an older version. Thank you for your responses.

[jggray]

I've just had IUS6.2 installed and tried to compile the do_test example. I get lots of errors some of which are shown below.

int unsigned seed_table [string];
|
ncvlog: *E,QAALPC (../../../src/base/ovm_misc.sv,36|32): Only local or protected associative arrays in classes have been implemented [SystemVerilog].
(`include file: ../../../src/base/ovm_misc.sv line 36, `include file: ../../../src/base/base.svh line 31, `include file: ../../../src/ovm.svh line 24, file: ../../../src/ovm_pkg.sv line 26)

bit seed_checker[int unsigned];
|
ncvlog: *E,QAALPC (../../../src/base/ovm_misc.sv,37|21): Only local or protected associative arrays in classes have been implemented [SystemVerilog].
(`include file: ../../../src/base/ovm_misc.sv line 37, `include file: ../../../src/base/base.svh line 31, `include file: ../../../src/ovm.svh line 24, file: ../../../src/ovm_pkg.sv line 26)

ovm_seed_map ovm_random_seed_table_lookup [string];
|
ncvlog: *E,QAASCO (../../../src/base/ovm_misc.sv,39|48): Support for associative arrays is currently only implemented for modules, interfaces and program blocks [SystemVerilog].
(`include file: ../../../src/base/ovm_misc.sv line 39, `include file: ../../../src/base/base.svh line 31, `include file: ../../../src/ovm.svh line 24, file: ../../../src/ovm_pkg.sv line 26)

function void ovm_scope_stack::up (ovm_void obj, byte separator =".");
|
ncvlog: *W,PMBDVX (../../../src/base/ovm_misc.sv,244|62): Default argument value matching in out of block declarations not yet implemented. The prototype declaration is used.

Any suggestions as to how I work around would be appreciated.

JohnG

[stuart]

JohnG-

Make sure you use "irun -f compile_ius.f" to run the example (and all examples in the OVM kit).

If that doesn't fix the problem can you post the exact IUS version you are using - I just tested with IUS 6.2-s3 and it works fine.

Thanks
Stuart

[jggray]

Hi Stuart,

I was using the "irun -f compile_ius.f" command as you suggested. The IUS version is, as copied from the Cadence download website, IUS06.20.003, Version: 06.20.003-s, I assume that's 6.2-s3?
I'm running under Linux, RHEL, but I'm not sure what version; uname generates the following
Linux 2.6.9-42.ELsmp #1 SMP Wed Jul 12 23:27:17 EDT 2006 i686 i686 i386 GNU/Linux.

John

[jggray]

Hi Stuart,

When I really, rather than thought I had, used IUS62, everything compiled correctly. Now the fun really begins...

Thanks for the help.

John

[bacem_81]

Hi,
I want to use only ncvlog and not irun, is it possible?
FYI: I used ncvlog with other examples picked from Internet and it's working, but when compiling the ovm I faced many errors,

[bacem_81]

Hi all,
I don't think irun command really instructive, I want to compile by myself with ncvlog and see every step of compilation, can you help me please?

[jggray]

The irun command accepts the -svpp option which allows irun to invoke a SystemVerilog
pre-processor; the following is an extract from the output of irun -helpall
-svpp Allow svpp to preprocess verilog files
I tried 'which svpp' and it's not installed with IUS6.2.3 and the equivalent option doesn't exist in ncvlog or ncverilog that I can see; -SV, for ncvlog, nor +sv for ncverilog don't get rid of the many PMBDVX warnings.